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Osmosis 2020 | December 1–2 | Virtual Event

 

What is Osmosis?

Osmosis stands for OneSpin Meeting on Solutions, Innovation, & Strategy. It is a users’ group for customers and partners of OneSpin Solutions, provider of electronic design automation (EDA) tools for integrated circuit (IC) integrity verification. Osmosis signifies balance and two-way movement—in this case, of technical knowledge and expertise among OneSpin's experts and users.

This users' group meeting is tailored for current and users of OneSpin 360™ verification solutions, but we welcome prospective users on a case-by-case basis. If IC integrity is important to you—particularly in the areas of functional correctness, safety, security, or trust—then this event is for you!

Due to the COVID-19 pandemic, this year's Osmosis will be a virtual event held over two consecutive afternoons. Last year, we gathered in Munich for a hard-hitting technical agenda and capped off the day with a festive Bavarian dinner. We will dearly miss seeing all of you in person, but we look forward to this opportunity to reconnect and to learn from fellow IC integrity enthusiasts!

 

Day 1 At-A-Glance

Tuesday, December 1, 2020 | 13:00 CET (UTC +1)

Keynote Address: Raik Brinkmann, President & CEO, OneSpin

User Case Studies:

OneSpin Technical Deep Dives:

  • Functional Correctness
  • FMEDA Automation & Safety
  • Trust & Security

 

Day 2 At-A-Glance

Wednesday, December 2, 2020 | 13:00 CET (UTC +1)

Keynote Address: Claudionor José Nunes Coelho, VP/Fellow of AI – Head of AI Labs, Palo Alto Networks

User Case Studies:

OneSpin Technical Deep Dives:

  • RISC-V
  • FPGA 

Breakout Sessions with OneSpin's Experts:

  • The Ins and Outs of Trust & Assurance
  • RISC-V and the Open Source Movement
  • FMEDA and Verification: Which Side Are You On?

Read on for the complete agenda—including session times and abstracts—and additional details!


Full Agenda for Osmosis 2020

Click to expand each day's agenda details

All times are shown in Central European Time (CET / UTC +1) and are subject to change

Meet Our Speakers

Get to know our OneSpin 360 users and guest keynote speaker

Speakers are listed in order of appearance on the program

Cedric Walravens | ICsense

Digital Team Lead

Dr. ir. Cedric Walravens holds a PhD in Electrical and Electronics Engineering from the KU Leuven, Belgium. In 2012, he joined ICsense, the largest European fab-independent design group, where he currently occupies the position of Digital Team Lead. He is passionate about delivering consistent quality through a no-nonsense digital design flow, as well as  growing knowledge within his team.

At Osmosis, Cedric will present a case study entitled Beyond Lint.

Keerthikumara Devarajegowda | Infineon Technologies

PhD Candidate

Keerthikumara Devarajegowda received his Master’s degree from Technische Universität Kaiserslautern, Germany, in the year 2016. He is currently with Infineon Technologies AG and is also pursuing his PhD at T.U. Kaiserslautern under the guidance of Dr. Wolfgang Ecker and Prof. Wolfgang Kunz. His research interests include formal verification, digital design modeling and automation techniques.

At Osmosis, Keerthi will present a case study entitled Formal Verification of Safety Mechanisms.

Ratish Punnoose | Sandia National Laboratories

Distinguished Member of Technical Staff

Dr. Ratish Punnoose is a Distinguished Member of Technical Staff at Sandia National Laboratories in Livermore, California. He provides technical leadership on the design and development of embedded systems for weapon components and has helped to incorporate formal verification as part of Sandia's digital design process. Ratish leads much of the formal verification of ASIC-based designs at Sandia. He is part of a group of Sandia researchers developing formal tools to specify system behavior and to create certifiably correct systems for high-consequence applications. Ratish has a PhD in Electrical and Computer Engineering from Carnegie Mellon University.

At Osmosis, Ratish will present a case study entitled Ensuring Completeness of Formal Verification with GapFree: To End or Not to End (Property Writing).

Wolfgang Kunz | Technische Universität Kaiserslautern

Professor, Department of Electrical & Computer Engineering

Wolfgang Kunz received the Dipl.-Ing. degree in Electrical Engineering from the University of Karlsruhe, Germany, in 1989 and the Dr.-Ing. degree in Electrical Engineering from the University of Hannover, Germany, in 1992. From 1993 to 1998, he was with Max Planck Society, Fault-Tolerant Computing Group at the University of Potsdam, Germany. From 1998 to 2001 he was a professor of Com­puter Science at the University of Frankfurt/Main. Since 2001 he is a professor at the Depart­ment of Electrical & Computer Engineering at Technische Universität Kaisers­lautern. 

Wolfgang Kunz conducts research in the area of system-on-chip design and verification. In many of his research projects, OneSpin Solutions has been a close collaboration partner. For his research activities Wolfgang Kunz has received several awards including the Berlin Brandenburg Academy of Science Award and the Award of the German IT Society. Wolfgang Kunz is a Fellow of the IEEE.

At Osmosis, Professor Kunz will present a case study entitled Hardware Security Verification Using Unique Program Execution Checking.

David Landoll | OneSpin Solutions on behalf of Nokia Corporation

Solutions Architect

David Landoll is a solutions architect at OneSpin Solutions, where he works to develop and deploy formal tools and methodologies. David focuses on safety, security, and trust related industries, including Department of Defense, automotive, and avionics. He has extensive experience in DO-254 and ISO 26262 safety standards and is a member of the North America DO-254 Users Group. With over 20 years of formal verification experience and almost 30 years of design and verification experience, David has directly managed and contributed to large projects, including an ADAS self-driving car system and safety-critical avionics SoCs, and has shared his expertise at numerous conferences and events. He holds a BSEE from the University of Arizona and MBA from Santa Clara University.

David has cultivated a strong working relationship with OneSpin's users at Nokia. At Osmosis, he will present a case study entitled Large Counter Verification Using Semi-Formal Techniques on behalf of co-author Kanthi Palaniappan, Specialist, SoC Verification, Mobile Broadband, Networks, Nokia.

Claudionor José Nunes Coelho | Palo Alto Networks

VP/Fellow for AI – Head of AI Labs

Claudionor N. Coelho is the VP/Fellow for AI – Head of AI Labs at Palo Alto Networks. Previously, he worked on Machine Learning/Deep Learning at Google. He is the creator of QKeras, a Deep Learning package for quantization on top of Keras with support for automatic quantization. He was the VP of Software Engineering, Machine Learning, and Deep Learning at NVXL Technology. He did seminal work on AI at Synopsys Inc, and he was the GM for Brazil for Cadence Design Systems, following the acquisition of Jasper Design Automation, where he was the Worldwide SVP of R&D. He has more than 80 papers, patents, academic, and industry awards. He is currently an Invited Professor for Deep Learning at Santa Clara University, and previously, he was an Associate Professor of Computer Science at UFMG, Brazil. He has a Ph.D. in EE/CS from Stanford University, an MBA from IBMEC Business School, and an MSCS and BSEE (summa cum laude) from UFMG, Brazil.

At Osmosis, Claudionor will deliver the closing keynote address on Day 2 on the topic of Application Specific ML: Building and Executing ML Models at Ultra-High Speeds with Applications in Debugging of SoCs.


Apply to Attend Osmosis 2020

Osmosis 2020 is a private event that is open primarily to current OneSpin users, but we have a limited number of registrations available for prospective users and other interested parties. You will receive an email confirmation containing registration information if your application is accepted.