RISC-V Design Requirements
By: Rob van Blommestein
To increase understanding of how verification and the associated tools and techniques should be applied to achieve complete verification, OneSpin's Rob van Blommestein offers some advice:
It is safe to say that RISC-V is enjoying a surge in popularity among the design community. Not only does the open source nature make it a cost-effective alternative to Cisc, but the instruction set architecture (ISA) is designed for flexibility.
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I have added a custom instruction. Do I need to re-verify the entire Risc-V core?
When anything is done to modify the custom instruction, it means the functionality has been added or changed. To ensure that the design operates as intended and does not do anything unintended, a full re-verification is strongly recommended.
