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Protect RISC-V processors from cyber attacks and Trojans (German)

By: Sergio Marchese

Processors, including those based on RISC-V, take on critical functions in many applications. But how can they be protected against cyber attacks and Trojans at the hardware IP level?

Current processor cores are often part of application-specific integrated circuits (ASICs) or FPGAs (Field Programmable Gate Arrays), where they perform essential control and data processing functions. The instruction set architecture (ISA) of the processors forms the interface between hardware and software and ensures the flexibility and programmability of the required functions.

The RISC-V open source ISA is becoming increasingly popular with advanced electronic systems as it allows developers to add highly customized extensions. The growing adoption of RISC-V is also fueling the ecosystem of tools, software and expertise, which in turn is driving its proliferation in an ever wider range of applications. In addition, there are no license costs or usage fees, so that a larger group of companies can develop innovative and at the same time affordable products. This development can already be observed in the field of IoT and portable devices with artificial intelligence.

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In this case, it would be valuable to have an automated, simple trust assessment process that can be applied to any IP. A process without a trustworthy IP model cannot guarantee the absence of a Trojan. However, it is possible to identify unusual and suspicious code patterns and known Trojan horse signatures as well as vulnerabilities that can be exploited for fraudulent purposes in later development stages.

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