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Chiplet Momentum Builds, Despite Tradeoffs

By Brian Bailey, Semiconductor Engineering | Feat. Sven Beyer, Product Manager Design Verification, OneSpin

Pre-characterized tiles can move Moore’s Law forward, but it’s not as easy as it looks.

Chip design is a series of tradeoffs. Some are technical, others are related to cost, competitive features or legal restrictions. But with the nascent ‘chiplet’ market, many of the established balance points are significantly altered, depending on market segments and ecosystem readiness.


"The chiplet also offers more opportunities for both security vulnerabilities and hidden hardware Trojans," cautions Sven Beyer, product manager for design verification at OneSpin Solutions. "Integrators will expect the vendor to verify these aspects of integrity. The SoC team may wish to re-run some aspects of standalone IP verification as part of screening vendors and evaluating chiplets."


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