DVClub Europe 2020 | IP Integration Into Complex SoCs
FREE to attend Online | September 8th, 2020 | 12:00 – 13:20 BST
SoC designs typically incorporate a range of (in-house and external) IP, all connected via different bus structures. In this DVClub we consider the effectiveness and efficiency of different verification techniques to ensure the IP has been correctly integrated.
OneSpin's Sergio Marchese will share his thoughts on IP Integration Verification in Extra-Large (XL) SoCs, including the following key points:
- Raising the abstraction level of IP connection specifications
- Automatic generation of detailed IP pin connectivity tables
- Exhaustive checking of 1 Million+ connections in multi-billion gate SoCs
Other presenters include Cadence, Arm, and Incore Semiconductors. Learn more about the event here.
The principal goal of each DVCLUB meeting is to have fun while helping build the European verification community through regular educational and networking events. Attendance at DVClub Europe meetings is free and is open to all non-service provider semiconductor professionals. Each meeting addresses a specific issue faced by the design and verification community and whatever your speciality provides an excellent opportunity for updating knowledge as well as share experiences, insights and issues with other members of the verification community.