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In the news

Semiconductor engineering: The Road Ahead For 2014

Identifying market trends is the first step in being able to ensure you have the right products when people need them, so what will you need for 2014?

Semiconductor Engineering asked several thought leaders in the industry about the market drivers that are affecting their product planning operations for 2014. While almost everyone sees mobile devices continuing to be the major driver during 2014, there are some emerging areas that may start to have a larger impact.

„Automotive could create a convergence, explains Dr. Raik Brinkmann, president and CEO of OneSpin Solutions, „between powerful multimedia/communications platforms and safety-critical devices that could impact design and verification flows.

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EDA Cafe: Formal Verification’s Perfect Storm of Change

Another major player in the formal world,OneSpin Solutions, also some strong opinions to share. Please join us in welcoming OneSpin’s Director of Marketing Dave Kelf with his guest post: "In my opinion, not only will formal dominate verification, but my belief is that the effect of this technology will be as transformational as the advent of logic synthesis."

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Tech Design Forum: Formal verification enables Agile RTL development

Agile flow for verification

Agile development started in the software domain but the methodology shows promise for SoC verification. Formal verification techniques can help implement an Agile flow. Sergio Marchese describes how to implement Agile principles into hardware design in an article on Tech Design Forum.

The aim of this article is to share two experiences where a novel approach was used to develop register transfer level (RTL) modules. System Verilog Assertions (SVAs) were developed in parallel with RTL code using OneSpin Solutions’360-DV (Design Verification).

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EETimes: The Year in EDA. Did Anything Happen?

Bryon Moyer takes a special look at System Level Verification

Bryon Moyer notes: "2013 is coming to a close, and this is usually a time for reflecting on what’s happened in the past year and what’s going to happen in the coming year. The thing is, though, when I sit back and reflect, well, I don’t know; it just seems like 2013 was a quiet year for EDA."

In this article he also takes a special look at System Level Verificaiton: "One of the obvious main drivers here is scale: we’re getting to the billion-gate mark. (By companies other than Intel.) Both OneSpin and Breker noted that UVM is breaking down at the full chip level: it’s actually added complexity. So methods other than simulating-until-you-drop are needed."

He further notes: "Several folks mentioned that the big winners in this are formal technology and emulation. More than one said that formal has gone mainstream this past year."

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Embedded Computing Design: Verifying embedded designs with cloud computing

Many industries have recognized the value of cloud computing both in terms of cost reduction through shared resources, and new capability offered by the medium. However, adoption of the cloud has been slow in the electronics segments, partly due to security concerns. This article discusses an approach to cloud usage in electronic design that breaks the security adoption barrier and highlights capabilities previously unavailable through traditional solutions.

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EE Times: Cloud-Based FPGA Verification from OneSpin & Plunify

Max Maxfield reports


I remember not so long ago when I first heard mention of "the cloud." Initially, this term seemed a little strange, but soon it was on everyone's lips, and now we take it for granted in many ways, such as storing and distributing data. ...

Of course, there are always concerns about the security of one's design data -- the "family jewels," as it were -- but my impression is that design and verification engineers, and the companies they work for, are becoming more accepting of the cloud-based computing concept as time marches on.

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