close By using this website, you agree to the use of cookies. Detailed information on the use of cookies on this website can be obtained on OneSpin's Privacy Policy. At this point you may also object to the use of cookies and adjust the browser settings accordingly.

Assuring the Integrity of RISC-V Processor Cores IP (Chinese)

By Sven Beyer, RISC-V Product Manager, OneSpin Solutions

One of the most-discussed topics in electronics today is the RISC-V processor instruction set architecture (ISA). Many conferences papers and technical articles have discussed RISC-V, with many more planned. While it is still early in the evolution of the processor architecture, RISC-V may be a revolutionary change in the intellectual property (IP) and semiconductor industry. It is defined by the RISC-V Foundation as “a free and open ISA enabling a new era of processor innovation through open standard collaboration.” As such, it directly challenges well- established processor families. Anyone can develop RISC-V processor cores or integrate them into system-on-chip (SoC) designs. The Foundation supports, standardizes, and evolves the RISC-V ISA without requiring a license or assessing any royalties.

Back

Related Links