DVCLUB Europe 2020 | Verification of AI Designs
FREE to attend Online | April 21, 2020
With the proliferation of IP and SoCs targeted at the fast growing AI (Artificial Intelligence) market, this year's DVClub Europe will focus on how such designs can be verified. The complete event will be hold online and is accessible for free.
TUESDAY April 21, 12:05 PM - 12:25 PM
AI Chips Must Get the Math Right
Sergio Marchese will present “AI Chips Must Get the Math Right” at the upcoming meeting of DVClub Europe on 21 April from 11:30 to 14:00 GMT.
Most AI chips and hardware accelerators that power machine learning (ML) and deep learning (DL) applications include floating-point units (FPUs). Algorithms used in neural networks are often based on operations that use multiplication and addition of floating-point values. FPUs are difficult to implement. The IEEE 754 standard defines many corner-case scenarios and non-ordinary values. Even a minor rounding mistake could accumulate over many iterations and produce a large error. An FPU formal verification app compliant with IEEE-754 provides an efficient and rigorous solutions to FPU functional verification
